Philippe Luc, director of verification at Codasip, talked to students of the UK Electronics Skills Foundation (UKESF) about what it is like to be a verification engineer. On one hand the UKESF ...

Semiconductor Engineering sat down to discuss the implications of having an executable specification that drives verification with Hagai Arbel, chief executive officer for VTool; Adnan Hamid, chief ...

Groundbreaking benefits of using artificial intelligence in design verification. How SHAPley values can help engineers optimize debugging in design verification. Achieving low-latency SoC ...

New design, verification and simulation solutions to re-engineer AI-powered product innovation at Synopsys Converge 2026.

Tell us a little about your professional and/or educational background. I did my bachelors’ degree in electrical and electronics in India. After graduating, I worked at Intel for a year as a design ...

Designing the hardware-software interface. Dealing with "bytes enables" in RTL verification. Automating the HSI design process across the entire dev team. The hardware-software interface (HSI) holds ...

Flexible integration preserves current investments with optimized performance and comprehensive verification in an open ecosystem Designed to work seamlessly with the Fuse EDA AI system, Siemens’ ...

In partnership with the Israel Tech Challenge, Apple is co-hosting an event at its Israel headquarters to discuss a new Design Verification Engineering course. This course will be a ten month-long ...